Design automation
High-Level Synthesis, domain-specific compilation flows, simulation, verification for hardware accelerators.
Research
High-Level Synthesis, domain-specific compilation flows, simulation, verification for hardware accelerators.
FPGA and ASIC acceleration, AI accelerators, parallel computing, and system-level design methods.
Model-based design and acceleration techniques for space-grade FPGA platforms and embedded systems.
Research Papers
C. Silvano, D. Ielmini, F. Ferrandi, L. Fiorin, S. Curzel, L. Benini, et al., ACM Computing Surveys 57.11
DOI: 10.1145/3729215, Open Access
M. Fiorito, S. Curzel, and F. Ferrandi, 2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
G. Gozzi, M. Fiorito, S. Curzel, C. Barone, V. G. Castellana, M. Minutoli et al., ACM TRETS 18.1
DOI: 10.1145/3677035, Open Access
S. Curzel, M. Fiorito, P. L. Cueva, T. Jorge, T. Tsiodras, and F. Ferrandi, ACM International Conference on Computing Frontiers
DOI: 10.1145/3587135.3592766, Open Access
S. Curzel, N. Bohm Agostini, V. G. Castellana, M. Minutoli, A. Limaye, J. Manzano, et al., IEEE Transactions on Computers 71.12
DOI: 10.1109/TC.2022.3211430, Open Access
N. Bohm Agostini, S. Curzel, J. J. Zhang, A. Limaye, C. Tan, V. Amatya, et al., IEEE Micro 42.5 (Best Paper Award)
Research projects
Open Design Environment for European Chips: Digital SoC Design.
Open Design Environment for European Chips: Productivity, Interoperability, Verification.
Leader of WP5 and of the cross-project ODE4EC Dissemination & Training Board.
For students
In 2025-2026, I am teaching Algoritmi e Architetture per il Calcolo ad Alte Prestazioni for the B.Sc. degree in Mathematical Engineering at PoliMi. All the course material is available on WeBeep.
M.Sc. students are welcome to contact me to discuss a thesis proposal if any of the topics I am working on are of interest; alternatively, check available projects here.
Contact
Dr. Serena Curzel
Dipartimento di Elettronica, Informazione e Bioingegneria
Politecnico di Milano